Method for manufacturing a multi-level interconnec

专利名称：Method for manufacturing a multi-level

interconnect structure

发明人：David Vaclav Horak,Charles William

Koburger, III,Peter H. Mitchell,Larry AlanNesbit

申请号：US10443709申请日：20030522公开号：US06713835B1公开日：20040330

专利附图：

摘要：A method for forming interlevel dielectric layers in multilevel interconnect

structures using air as the constituent low-k dielectric material that is compatible withdamascene processes without introducing additional process steps. The conductivefeatures characteristic of the damascene process are formed by standard lithographicand etch processes in the mandrel material for each level of the interconnect structure.The conductive features in each level are surrounded by the mandrel material. After alllevels of the interconnect structure are formed, a passageway is provided to the mandrelmaterial. An isotropic etchant is introduced through the passageway that selectivelyetches and removes the mandrel material. The spaces formerly occupied by the mandrelmaterial in the levels of the interconnect structure are filled by air, which operates as alow-k dielectric material.

申请人：INTERNATIONAL BUSINESS MACHINES CORPORATION

代理机构：Wood, Herron & Evans, LLP

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