DC offset calibration circuit

专利名称：DC offset calibration circuit发明人：Yi-Shao Chang,Ka-Un Chan申请号：US16027362申请日：20180704公开号：US10224910B1公开日：20190305

专利附图：

摘要：A DC offset calibration circuit for calibrating DC offset with multi-level methodincludes analog DC offset cancellation unit and digital DC offset cancellation unit, whereinanalog DC offset cancellation unit includes first amplifier and integrator, first amplifierreceives analog signal with DC offset, and transmits to integrator, and integrator

transmits first feedback signal to first amplifier to output amplified signal with fixed DCoffset, and digital DC offset cancellation unit includes comparator, digital circuit, digital-to-analog converter and second amplifier, where second amplifier receives amplifiedsignal with fixed DC offset and transmits to comparator for determining DC offset valueand transmitting to digital circuit, digital circuit generates logical result according to DCoffset value and transmits to digital-to-analog converter, and therefore digital-to-analogconverter accordingly generates second feedback signal to second amplifier, to calibrateDC offset value on second amplifier.

申请人：Realtek Semiconductor Corp.

地址：HsinChu TW

国籍：TW

代理人：Winston Hsu

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