PCA9549
Octal bus switch with individually I2C-bus controlled enables
Rev. 01 — 11 July 2006
Product data sheet
1.General description
The PCA9549 provides eight bits of high speed TTL-compatible bus switching controlledby the I2C-bus. The low ON-state resistance of the switch allows connections to be madewithminimalpropagationdelay.AnyindividualAtoBchannelorcombinationofchannelscanbeselectedviatheI2C-bus,determinedbythecontentsoftheprogrammableControlregister. When the I2C-bus bit is HIGH (logic1), the switch is on and data can flow fromPortA to PortB, or viceversa. When the I2C-bus bit is LOW (logic0), the switch is open,creating a high-impedance state between the two ports, which stops the data flow.An activeLOW reset input (RESET) allows the PCA9549 to recover from a situationwheretheI2C-busisstuckinaLOWstate.PullingtheRESETpinLOWresetstheI2C-busstate machine and causes all the bits to be open, as does the internal power-on resetfunction.
Three address pins allow up to eight devices on the same bus.
2.Features
IIIIIIIIIIIIIII
8-bit bus switch (CBT)
5Ω switch connection between two ports
I2C-bus interface logic; compatible with SMBus standardsActiveLOWRESET input3 address pins allowing up to 8 devices on the I2C-busBit selection via I2C-bus, in any combinationPower-up with all bits deselectedLow Ron switchesNo glitch on power-upSupports hot insertionLow standby current
Operating power supply voltage range of 2.3V to 5.5V5V tolerant inputs
0Hz to 400kHz clock frequency
ESD protection exceeds 2000V HBM per JESD22-A114, 200V MM perJESD22-A115 and 1000V CDM per JESD22-C101
ILatch-up testing is done to JEDEC Standard JESD78 which exceeds 100mAIPackages offered: SO24, TSSOP24, HVQFN24
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Philips Semiconductors
PCA9549
Octal bus switch with individually I2C-bus controlled enables
3.Ordering information
Table 1.
Ordering information
PackageNamePCA9549DPCA9549PWPCA9549BS
SO24TSSOP24HVQFN24
Descriptionplastic small outline package; 24 leads;bodywidth7.5mm
plastic thin shrink small outline package; 24 leads;bodywidth 4.4mm
plastic thermal enhanced very thin quad flat package;no leads; 24terminals; body 4×4×0.85mm
VersionSOT137-1SOT355-1SOT616-1
Type number3.1Ordering options
Table 2.PCA9549DPCA9549PWPCA9549BS
Ordering options
Topside markPCA9549DPCA95499549
Temperature range−40°C to +85°C−40°C to +85°C−40°C to +85°C
Type number4.Block diagram
PCA95491A2A3A4A5A6A7A8A1B2B3B4B5B6B7B8BVSSVDDRESETSWITCH CONTROL LOGICRESETCIRCUITSCLSDAINPUTFILTERI2C-BUSCONTROLA0A1A2002aaa991Fig 1.Block diagramPCA9549_1
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PCA9549
Octal bus switch with individually I2C-bus controlled enables
5.Pinning information
5.1Pinning
A0A1RESET1A1B2A2B3A3B12345678924VDD23SDA22SCL21A2208A198B187A177B166A156B145A135B002aaa992A0A1RESET1A1B2A2B3A3B12345678924VDD23SDA22SCL21A2208A198B187A177B166A156B145A135B002aaa993PCA9549DPCA9549PW4A104B11VSS124A104B11VSS12Fig 2.Pin configuration of SO2424RESETFig 3.Pin configuration of TSSOP2420SDA23A11A1B2A2B3A3B1234565B105A116B1278922A0terminal 1index area19SCL18A2178A168B157A147B136A002aaa994PCA9549BSTransparent top viewFig 4.Pin configuration of HVQFN24 (transparent top view)PCA9549_1
VSS4A4B21VDD© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
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PCA9549
Octal bus switch with individually I2C-bus controlled enables
5.2Pin description
Table 3.SymbolA0A1RESET1A1B2A2B3A3B4A4BVSS5B5A6B6A7B7A8B8AA2SCLSDAVDD
[1]
Pin descriptionPinSO, TSSOP123456789101112131415161718192021222324
HVQFN222324123456789[1]101112131415161718192021
address input 0address input 1activeLOW reset inputinputoutputinputoutputinputoutputinputoutputsupply groundoutputinputoutputinputoutputinputoutputinput
address input 2serial clock lineserial data linesupply voltageDescriptionHVQFNpackagediesupplygroundisconnectedtoboththeVSSpinandtheexposedcenterpad.TheVSSpinmustbeconnectedtosupplygroundforproperdeviceoperation.Forenhancedthermal,electrical,andboard-level performance, the exposed pad needs to be soldered to the board using a correspondingthermal pad on the board, and for proper heat conduction through the board thermal vias need to beincorporated in the PCB in the thermal pad region.
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PCA9549
Octal bus switch with individually I2C-bus controlled enables
6.Functional description
6.1Device addressing
Following a START condition, the bus master must output the address of the slave it isaccessing. The address of the PCA9549 is shown inFigure5. To conserve power, nointernal pull-up resistors are incorporated on the hardware selectable address pins andthey must be pulled HIGH or LOW.
1110A2A1A0R/Wfixedhardwareselectable002aaa962Fig 5.Slave addressThe last bit of the slave address defines the operation to be performed. When set tologic1 a read is selected, while a logic0 selects a write operation.
6.2Control register
Followingthesuccessfulacknowledgementoftheslaveaddress,thebusmasterwillsenda byte to the PCA9549, which will be stored in the Control register. If multiple bytes arereceived by the PCA9549, it will save the last byte received. This register can be writtenand read via the I2C-bus.
channel selection bits(read/write)7B76B65B54B43B32B21B10B0bit 1bit 2bit 3bit 4bit 5bit 6bit 7bit 8002aab254Fig 6.Control register6.2.1Control register definition
One or several bits are selected by the contents of the Control register. This register iswritten after the PCA9549 has been addressed. The entire control byte is used todetermine which bit is to be selected. When a bit is selected to close, the bit will closeafter the Acknowledge has been placed on the I2C-bus.
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PCA9549
Octal bus switch with individually I2C-bus controlled enables
Table 4.Control register
Write = channel selection; read = channel status.B7XXXXXXX01
[1]
B6XXXXXX01X
B5XXXXX01XX
B4XXXX01XXX
B3XXX01XXXX
B2XX01XXXXX
B1X01XXXXXX
B001XXXXXXX
Commandbit1 disabledbit1 enabledbit2 disabledbit2 enabledbit3 disabledbit3 enabledbit4 disabledbit4 enabledbit5 disabledbit5 enabledbit6 disabledbit6 enabledbit7 disabledbit7 enabledbit8 disabledbit8 enabled
Severalbitscanbeenabledatthesametime.Forexample,B7=0,B6=1,B5=0,B4=0,B3=1,B2=1,B1=0, B0=0, means that bit8, bit6, bit5, bit2, and bit1 are disabled and bit7, bit4, and bit3 areenabled.
6.3RESET inputTheRESET input is an activeLOW signal which may be used to recover from a bus faultcondition.ByassertingthissignalLOWforaminimumoftw(rst)L,thePCA9549willresetitsregisters and I2C-bus state machine and will open all bits. TheRESET input must beconnected to VDD through a pull-up resistor.
6.4Power-on reset
When power is applied to VDD, an internal Power-On Reset (POR) holds the PCA9549 inaresetstateuntilVDDhasreachedVPOR.Atthispoint,theresetconditionisreleasedandthePCA9549registersandI2C-busstatemachineareinitializedtotheirdefaultstates,allzeroes causing all the bits to be open (high-impedance state).
6.5CBT characteristic over VDD range
The bus switch is optimized at 5.0V but can operate over the entire supply range withlower Vo(sw) voltage and higher gate resistance.
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PCA9549
Octal bus switch with individually I2C-bus controlled enables
5.0Vo(sw)(V)4.0(1)(2)(3)002aaa9643.02.01.02.02.53.03.54.04.55.55.0VDD (V)(1)maximum(2)typical(3)minimumFig 7.Vo(sw) voltage versus VDDFigure7 shows the voltage characteristics of the pass gate transistors (note that thePCA9549 is only tested at the points specified inSection 9 “Static characteristics”). InorderforthePCA9549toactasavoltagetranslator,theVo(sw)voltageshouldbeequalto,orlowerthanthelowestbusvoltage.Forexample,ifthemainbuswasrunningat5V,andthedownstreambuseswere3.3Vand2.7V,thenVo(sw)shouldbeequaltoorbelow2.7Vto effectively clamp the downstream bus voltages. Looking atFigure7, we see that Vo(sw)(maximum) will be at 2.7V when the PCA9549 supply voltage is 3.5V or lower so thePCA9549supplyvoltagecouldbesetto3.3V.Pull-upresistorscanthenbeusedtobringthe bus voltages to their appropriate levels (seeFigure16).
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PCA9549
Octal bus switch with individually I2C-bus controlled enables
7.Characteristics of the I2C-bus
TheI2C-busisfor2-way,2-linecommunicationbetweendifferentICsormodules.Thetwolines are a serial data line (SDA) and a serial clock line (SCL). Both lines must be
connected to a positive supply via a pull-up resistor. Data transfer may be initiated onlywhen the bus is not busy.
7.1Bit transfer
Onedatabitistransferredduringeachclockpulse.ThedataontheSDAlinemustremainstable during the HIGH period of the clock pulse as changes in the data line at this timewill be interpreted as control signals (seeFigure8).
SDASCLdata linestable;data validchangeof dataallowedmba607Fig 8.Bit transfer7.1.1START and STOP conditions
Both data and clock lines remain HIGH when the bus is not busy. A HIGH-to-LOW
transition of the data line while the clock is HIGH is defined as the START condition (S).ALOW-to-HIGHtransitionofthedatalinewhiletheclockisHIGHisdefinedastheSTOPcondition (P) (seeFigure9).
SDASDASCLSSTART conditionPSTOP conditionSCLmba608Fig 9.Definition of START and STOP conditions7.2System configuration
A device generating a message is a ‘transmitter’; a device receiving is the ‘receiver’. Thedevice that controls the message is the ‘master’ and the devices which are controlled bythe master are the ‘slaves’ (seeFigure10).
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PCA9549
Octal bus switch with individually I2C-bus controlled enables
SDASCLMASTERTRANSMITTER/RECEIVERSLAVERECEIVERSLAVETRANSMITTER/RECEIVERMASTERTRANSMITTERMASTERTRANSMITTER/RECEIVERI2C-BUSMULTIPLEXERSLAVE002aaa966Fig 10.System configuration7.3Acknowledge
The number of data bytes transferred between the START and the STOP conditions fromtransmitter to receiver is not limited. Each byte of eightbits is followed by one
acknowledge bit. The acknowledge bit is a HIGH level put on the bus by the transmitter,whereas the master generates an extra acknowledge related clock pulse.
Aslavereceiverwhichisaddressedmustgenerateanacknowledgeafterthereceptionofeach byte. Also a master must generate an acknowledge after the reception of each bytethat has been clocked out of the slave transmitter. The device that acknowledges has topulldowntheSDAlineduringtheacknowledgeclockpulse,sothattheSDAlineisstableLOW during the HIGH period of the acknowledge related clock pulse; set-up and holdtimes must be taken into account.
A master receiver must signal an end of data to the transmitter by not generating anacknowledge on the last byte that has been clocked out of the slave. In this event, thetransmitter must leave the data line HIGH to enable the master to generate a STOPcondition.
data outputby transmitternot acknowledgedata outputby receiveracknowledgeSCL from masterSSTARTcondition128clock pulse foracknowledgement9002aaa987Fig 11.Acknowledgement on the I2C-busPCA9549_1© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
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PCA9549
Octal bus switch with individually I2C-bus controlled enables
7.4Bus transactions
Data is transmitted to the PCA9549 control register using the Write mode as shown inFigure12.
slave addressSDAS1110A2A1A00AB7B6control registerB5B4B3B2B1B0APSTART conditionR/Wacknowledgefrom slaveacknowledgefrom slaveSTOP condition002aac430Fig 12.Write control registerData is read from the PCA9549 using the Read mode as shown inFigure13.
slave addressSDAS1110A2A1A01AB7B6control registerB5B4B3B2B1last byteB0APSTART conditionR/Wacknowledgefrom slaveno acknowledgefrom masterSTOP condition002aac431Fig 13.Read control register8.Limiting values
Table 5.Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).[1]SymbolVDDVIIIIOIDDISSPtotTstgTamb
[1]
Parametersupply voltageinput voltageinput currentoutput currentsupply currentground supply currenttotal power dissipationstorage temperatureambient temperature
ConditionsMin−0.5−0.5−20−25−100−100-−60
Max+7.0+7.0+20+25+100+100400+150+85
UnitVVmAmAmAmAmW°C°C
operating−40
The performance capability of a high-performance integrated circuit in conjunction with its thermal
environment can create junction temperatures which are detrimental to reliability. The maximum junctiontemperature of this integrated circuit should not exceed 125°C.
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PCA9549
Octal bus switch with individually I2C-bus controlled enables
9.Static characteristics
Table 6.Static characteristics
VDD = 2.3V to 3.6V; VSS = 0V; Tamb =−40°C to +85°C; unless otherwise specified.SeeTable7 on page12 for VDD = 4.5V to 5.5V[1].SymbolSupplyVDDIDDIstbVPORVILVIHIOLILCiVILVIHILICi
Pass gateRon
ON-state resistance
VDD=3.0V to 3.6V; VO=0.4V;IO=15mA
VDD=2.3V to 2.7V; VO=0.4V;IO=10mA
Vo(sw)
switch output voltage
Vi(sw)=VDD=3.3V; Io(sw)=−100µAVi(sw)=VDD=3.0V to 3.6V;Io(sw)=−100µA
Vi(sw)=VDD=2.5V; Io(sw)=−100µAVi(sw)=VDD=2.3V to 2.7V;Io(sw)=−100µA
ILCio
[1][2]
Parametersupply voltagesupply currentstandby currentpower-on reset voltageLOW-level input voltageHIGH-level input voltageLOW-level output currentleakage currentinput capacitanceLOW-level input voltageHIGH-level input voltageinput leakage currentinput capacitance
ConditionsMin2.3
Typ-200.11.6-----6---2781.9-1.5--3
Max3.65012.1+0.3VDD6--+121+0.3VDDVDD+0.5+151215-2.8-2.0+15
UnitVµAµAVVVmAmAµApFVVµApFΩΩVVVVµApF
Operatingmode;VDD=3.6V;noload;VI=VDD or VSS; fSCL=100kHzStandby mode; VDD=3.6V; noload;VI=VDDorVSS
noload; VI=VDDorVSS
[2]
---−0.50.7VDD
Input SCL; input/output SDA
VOL=0.4VVOL=0.6VVI=VDDorVSSVI=VSS36−1-−0.50.7VDD
Select inputs A0toA2,RESETpin at VDD or VSSVI=VSS
−1----1.6-1.0−1-
leakage currentinput/output capacitance
VI=VDDorVSSVI=VSS
For operation between published voltage ranges, refer to the worst-case parameters in both ranges.VDD must be lowered to 0.2V in order to reset part.
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PCA9549
Octal bus switch with individually I2C-bus controlled enables
Table 7.Static characteristics
VDD = 4.5V to 5.5V; VSS = 0V; Tamb =−40°C to +85°C; unless otherwise specified.SeeTable6 on page11 for VDD = 2.3V to 3.6V[1].SymbolSupplyVDDIDD
supply voltagesupply current
Operating mode; VDD=5.5V;noload; VI=VDD or VSS;fSCL=100kHz
Standby mode; VDD=5.5V;noload; VI=VDDorVSSnoload; VI=VDDorVSS
[2]
ParameterConditionsMin4.5-
Typ-65
Max5.5100
UnitVµA
IstbVPORVILVIHIOLIILIIHCiVILVIHILICi
Pass gateRonVo(sw)
standby currentpower-on reset voltageLOW-level input voltageHIGH-level input voltageLOW-level output currentLOW-level input currentHIGH-level input currentinput capacitanceLOW-level input voltageHIGH-level input voltageinput leakage currentinput capacitanceON-state resistanceswitch output voltage
--−0.50.7VDD
0.61.7------6---253.6--3
22.1+0.3VDD6--1121+0.3VDDVDD+0.5+5058-4.5+105
µAVVVmAmAµAµApFVVµApFΩVVµApF
Input SCL; input/output SDA
VOL=0.4VVOL=0.6VVI=VSSVI=VSSVI=VSS3611-−0.50.7VDD
Select inputs A[0:2]/RESETpin at VDD or VSSVI=VSS
VDD=4.5V to 5.5V; VO=0.4V;IO=15mAVi(sw)=VDD=5.0V;Io(sw)=−100µA
Vi(sw)=VDD=4.5V to 5.5V;Io(sw)=−100µA
−1---2.6−10-
ILCio
[1][2]
leakage currentinput/output capacitance
VI=VDDorVSSVI=VSS
For operation between published voltage ranges, refer to the worst-case parameters in both ranges.VDD must be lowered to 0.2V in order to reset part.
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PCA9549
Octal bus switch with individually I2C-bus controlled enables
10.Dynamic characteristics
Table 8.SymbolDynamic characteristicsParameterConditionsStandard-modeI2C-busMintPDfSCLtBUFtHD;STAtLOWtHIGHtSU;STAtSU;STOtHD;DATtSU;DATtrtfCbtSPtVD;DATtVD;ACKRESETtw(rst)LtrsttREC;STA
[1][2][3][4]
Fast-mode I2C-busUnitMin-01.30.61.30.60.60.60[3]100
Max0.25[1]400------0.9-nskHzµsµsµsµsµsµsµsnsnsµsµsnsµsµsµsnsnsns
Max0.25[1]100------3.45-10003004005010.61---
propagation delaySCL clock frequency
bus free time between a STOP andSTART condition
hold time (repeated) START conditionLOW period of the SCL clockHIGH period of the SCL clockset-up time for a repeated STARTcondition
set-up time for STOP conditiondata hold timedata set-up time
rise time of both SDA and SCLsignals
fall time of both SDA and SCL signalscapacitive load for each bus linepulse width of spikes that must besuppressed by the input filterdata valid time
data valid acknowledge timeLOW-level reset timereset time
recovery time to START condition
A to B;
VDD=4.5Vto 5.5V
-04.7
[2]
4.04.74.04.74.00[3]250----
20+0.1Cb[4]30020+0.1Cb[4]300-----45000
4005010.61---
HIGH-to-LOWLOW-to-HIGH
---4
SDA clear5000
Pass gate propagation delay is calculated from the 6Ω typical Ron and the 50pF load capacitance.After this period, the first clock pulse is generated.
A device must internally provide a hold time of at least 300ns for the SDA signal (referred to the VIH(min) of the SCL signal) in order tobridge the undefined region of the falling edge of SCL.Cb=total capacitance of one bus line in pF.
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PCA9549
Octal bus switch with individually I2C-bus controlled enables
SDAtBUFtLOWSCLtrtftHD;STAtSPtHD;STAPStHD;DATtHIGHtSU;DATtSU;STASrtSU;STOP002aaa986Fig 14.Definition of timing on the I2C-busSTARTSCLACK or read cycleSDA70 %trstRESET50 %trec(rst)50 %tw(rst)L002aac31450 %Fig 15.Definition ofRESET timingPCA9549_1© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
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PCA9549
Octal bus switch with individually I2C-bus controlled enables
11.Application information
VDD = 5.0 VVDD = 5.0 VI2C-bus/SMBusMASTERSDASCLSDASCLRESET1A1Bbit 12A2Bbit 23A3Bbit 3PCA95494A4Bbit 45A5Bbit 56A6Bbit 67AA2A1A0VSS8A8B7Bbit 7bit 8002aaa995Remark:B can also be input and A can also be output as shown in bit8.Fig 16.Typical applicationABCDESCLSDARESETABCDE002aac279Fig 17.Custom multiplexer or demultiplexer applicationPCA9549_1
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Octal bus switch with individually I2C-bus controlled enables
AAABACADBABBBCBDSCLSDARESETAB002aac280Fig 18.2 channel 4-to-1 multiplexer or demultiplexer12.Test information
2VDDVDDPULSEGENERATORRTRLVODUTCL50 pF002aac315CL=load capacitance includes jig and probe capacitanceRL=load resistanceRT=termination resistance; should be equal to Zo of pulse generatorFig 19.Test circuitPCA9549_1© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
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Octal bus switch with individually I2C-bus controlled enables
13.Package outline
SO24: plastic small outline package; 24 leads; body width 7.5 mm
SOT137-1
DEAXcyHEvMAZ2413QA2pin 1 indexLpL1ebp12wMdetail XA1(A )3θA05scale10 mmDIMENSIONS (inch dimensions are derived from the original mm dimensions)UNITmminchesAmax.2.650.1A10.30.1A22.452.25A30.250.01bp0.490.36c0.320.23D(1)15.615.20.610.60E(1)7.67.40.300.29e1.270.05HE10.6510.00L1.4Lp1.10.4Q1.11.00.0430.039v0.250.01w0.250.01y0.10.004Z(1)θo0.90.40.0350.0160.0120.0960.0040.0890.0190.0130.0140.0090.4190.0430.0550.3940.0168o0Note1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. OUTLINEVERSION SOT137-1 REFERENCES IEC 075E05 JEDEC MS-013 JEITAEUROPEANPROJECTIONISSUE DATE99-12-2703-02-19Fig 20.SO24 package outline (SOT137-1)
PCA9549_1
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PCA9549
Octal bus switch with individually I2C-bus controlled enables
TSSOP24: plastic thin shrink small outline package; 24 leads; body width 4.4 mmSOT355-1
DEAXcyHEvMAZ2413QA2pin 1 indexA1(A )3AθLpLdetail X1ebp12wM02.5scale5 mmDIMENSIONS (mm are the original dimensions) UNITmmAmax.1.1A10.150.05A20.950.80A30.25bp0.300.19c0.20.1D(1)7.97.7E(2)4.54.3e0.65HE6.66.2L1Lp0.750.50Q0.40.3v0.2w0.13y0.1Z(1)0.50.2θ8o0oNotes1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.OUTLINEVERSION SOT355-1 REFERENCES IEC JEDEC MO-153 JEITAEUROPEANPROJECTIONISSUE DATE99-12-2703-02-19Fig 21.TSSOP24 package outline (SOT355-1)
PCA9549_1
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PCA9549
Octal bus switch with individually I2C-bus controlled enables
HVQFN24: plastic thermal enhanced very thin quad flat package; no leads;24 terminals; body 4 x 4 x 0.85 mm
SOT616-1
DBAterminal 1index areaAEA1cdetail Xe11/2 eCb1213evMCABwMCy1Cye7L6Eh1/2 ee21terminal 1index area1824Dh019X2.5scale5 mmDIMENSIONS (mm are the original dimensions)UNITmmA(1)max.1A10.050.00b0.300.18c0.2D(1)4.13.9Dh2.251.95E(1)4.13.9Eh2.251.95e0.5e12.5e22.5L0.50.3v0.1w0.05y0.05y10.1Note1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. OUTLINEVERSION SOT616-1 REFERENCES IEC- - - JEDECMO-220 JEITA- - -EUROPEANPROJECTIONISSUE DATE01-08-0802-10-22Fig 22.HVQFN24 package outline (SOT616-1)
PCA9549_1
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PCA9549
Octal bus switch with individually I2C-bus controlled enables
14.Soldering
14.1Introduction to soldering surface mount packages
There is no soldering method that is ideal for all surface mount IC packages. Wave
solderingcanstillbeusedforcertainsurfacemountICs,butitisnotsuitableforfinepitchSMDs. In these situations reflow soldering is recommended.
14.2Reflow soldering
Reflow soldering requires solder paste (a suspension of fine solder particles, flux andbinding agent) to be applied to the printed-circuit board by screen printing, stencilling orpressure-syringe dispensing before package placement. Driven by legislation andenvironmental forces the worldwide use of lead-free solder pastes is increasing.Several methods exist for reflowing; for example, convection or convection/infraredheating in a conveyor type oven. Throughput times (preheating, soldering and cooling)vary between 100secondsand200seconds depending on heating method.Typical reflow temperatures range from 215°Cto260°C depending on solder pastematerial. The peak top-surface temperature of the packages should be kept below:
Table 9.
SnPb eutectic process - package peak reflow temperatures (fromJ-STD-020CJuly 2004)
Volume mm3 <350240°C+0/−5°C225°C+0/−5°C
Volume mm3≥350225°C+0/−5°C225°C+0/−5°C
Package thickness< 2.5 mm≥2.5 mmTable 10.
Pb-free process - package peak reflow temperatures (fromJ-STD-020C July2004)
Volume mm3 <350260°C + 0°C260°C + 0°C250°C + 0°C
Volume mm3 350 to2000260°C + 0°C250°C + 0°C245°C + 0°C
Volume mm3 >2000260°C + 0°C245°C + 0°C245°C + 0°C
Package thickness< 1.6 mm1.6 mm to 2.5 mm≥ 2.5 mm
Moisture sensitivity precautions, as indicated on packing, must be respected at all times.
14.3Wave soldering
Conventional single wave soldering is not recommended for surface mount devices(SMDs) or printed-circuit boards with a high component density, as solder bridging andnon-wetting can present major problems.
To overcome these problems the double-wave soldering method was specificallydeveloped.
If wave soldering is used the following conditions must be observed for optimal results:
•Use a double-wave soldering method comprising a turbulent wave with high upward
pressure followed by a smooth laminar wave.
•For packages with leads on two sides and a pitch (e):
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–larger than or equal to 1.27mm, the footprint longitudinal axis ispreferred to beparallel to the transport direction of the printed-circuit board;–smaller than 1.27mm, the footprint longitudinal axismust be parallel to thetransport direction of the printed-circuit board.The footprint must incorporate solder thieves at the downstream end.
•For packages with leads on four sides, the footprint must be placed at a 45° angle to
the transport direction of the printed-circuit board. The footprint must incorporatesolder thieves downstream and at the side corners.
During placement and before soldering, the package must be fixed with a droplet ofadhesive. The adhesive can be applied by screen printing, pin transfer or syringedispensing. The package can be soldered after the adhesive is cured.
Typicaldwelltimeoftheleadsinthewaverangesfrom3secondsto4secondsat250°Cor 265°C, depending on solder material applied, SnPb or Pb-free respectively.Amildly-activated flux will eliminate the need for removal of corrosive residues in mostapplications.
14.4Manual soldering
Fixthecomponentbyfirstsolderingtwodiagonally-oppositeendleads.Usealowvoltage(24V or less) soldering iron applied to the flat part of the lead. Contact time must belimited to 10seconds at up to 300°C.
When using a dedicated tool, all other leads can be soldered in one operation within2secondsto5seconds between 270°Cand320°C.
14.5Package related soldering information
Table 11.Package[1]BGA, HTSSON..T[3], LBGA, LFBGA, SQFP,SSOP..T[3], TFBGA, VFBGA, XSON
DHVQFN, HBCC, HBGA, HLQFP, HSO, HSOP,HSQFP, HSSON, HTQFP, HTSSOP, HVQFN,HVSON, SMSPLCC[5], SO, SOJLQFP, QFP, TQFP
SSOP, TSSOP, VSO, VSSOP
CWQCCN..L[8], PMFP[9], WQCCN..L[8]
[1][2]
Suitability of surface mount IC packages for wave and reflow soldering methods
Soldering methodWavenot suitablenot suitable[4]
Reflow[2]suitablesuitable
suitable
not recommended[5][6]not recommended[7]not suitable
suitablesuitablesuitablenot suitable
For more detailed information on the BGA packages refer to the(LF)BGA Application Note (AN01026);order a copy from your Philips Semiconductors sales office.
All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, themaximum temperature (with respect to time) and body size of the package, there is a risk that internal orexternal package cracks may occur due to vaporization of the moisture in them (the so called popcorneffect). For details, refer to the Drypack information in theDataHandbook IC26; Integrated CircuitPackages; Section: Packing Methods.
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[3]
These transparent plastic packages are extremely sensitive to reflow soldering conditions and must on noaccountbeprocessedthroughmorethanonesolderingcycleorsubjectedtoinfraredreflowsolderingwithpeaktemperatureexceeding217°C±10°Cmeasuredintheatmosphereofthereflowoven.Thepackagebody peak temperature must be kept as low as possible.
These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, thesolder cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsinkon the top side, the solder might be deposited on the heatsink surface.
If wave soldering is considered, then the package must be placed at a 45° angle to the solder wavedirection. Thepackage footprint must incorporate solder thieves downstream and at the side corners.Wave soldering is suitable for LQFP, QFP and TQFP packages with a pitch (e) larger than 0.8mm; it isdefinitely not suitable for packages with a pitch (e) equal to or smaller than 0.65mm.
WavesolderingissuitableforSSOP,TSSOP,VSOandVSSOPpackageswithapitch(e)equaltoorlargerthan 0.65mm; itis definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5mm.Image sensor packages in principle should not be soldered. They are mounted in sockets or deliveredpre-mountedonflexfoil.However,theimagesensorpackagecanbemountedbytheclientonaflexfoilbyusing a hot bar soldering process. The appropriate soldering profile can be provided on request.Hot bar soldering or manual soldering is suitable for PMFP packages.
[4]
[5][6][7][8]
[9]
15.Abbreviations
Table 12.AcronymCBTCDMDUTESDHBMI2CMMPCBSMBusTTL
Abbreviations
DescriptionCross Bar TechnologyCharged Device ModelDevice Under TestElectroStatic DischargeHuman Body ModelInter Integrated CircuitMachine ModelPrinted-Circuit BoardSystem Management BusTransistor-Transistor Logic
16.Revision history
Table 13.
Revision history
Release date20060711
Data sheet statusProduct data sheet
Change notice-Supersedes-Document IDPCA9549_1
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17.Legal information
17.1Data sheet status
Document status[1][2]Objective [short] data sheetPreliminary [short] data sheetProduct [short] data sheet
[1][2][3]
Product status[3]DevelopmentQualificationProduction
DefinitionThis document contains data from the objective specification for product development.This document contains data from the preliminary specification.This document contains the product specification.
Please consult the most recently issued document before initiating or completing a design.The term ‘short data sheet’ is explained in section “Definitions”.
Theproductstatusofdevice(s)describedinthisdocumentmayhavechangedsincethisdocumentwaspublishedandmaydifferincaseofmultipledevices.Thelatestproductstatusinformation is available on the Internet at URLhttp://www.semiconductors.philips.com.
17.2Definitions
Draft —The document is a draft version only. The content is still underinternal review and subject to formal approval, which may result inmodifications or additions. Philips Semiconductors does not give anyrepresentations or warranties as to the accuracy or completeness of
informationincludedhereinandshallhavenoliabilityfortheconsequencesofuse of such information.
Short data sheet —A short data sheet is an extract from a full data sheetwiththesameproducttypenumber(s)andtitle.Ashortdatasheetisintendedforquickreferenceonlyandshouldnotbereliedupontocontaindetailedandfull information. For detailed and full information see the relevant full datasheet, which is available on request via the local Philips Semiconductorssalesoffice.Incaseofanyinconsistencyorconflictwiththeshortdatasheet,the full data sheet shall prevail.
to result in personal injury, death or severe property or environmental
damage. Philips Semiconductors accepts no liability for inclusion and/or useof Philips Semiconductors products in such equipment or applications andtherefore such inclusion and/or use is at the customer’s own risk.
Applications —Applications that are described herein for any of these
products are for illustrative purposes only. Philips Semiconductors makes norepresentation or warranty that such applications will be suitable for thespecified use without further testing or modification.
Limiting values —Stress above one or more limiting values (as defined intheAbsoluteMaximumRatingsSystemofIEC60134)maycausepermanentdamage to the device. Limiting values are stress ratings only and and
operation of the device at these or any other conditions above those given inthe Characteristics sections of this document is not implied. Exposure tolimiting values for extended periods may affect device reliability.
Terms and conditions of sale —Philips Semiconductors products are soldsubjecttothegeneraltermsandconditionsofcommercialsale,aspublishedathttp://www.semiconductors.philips.com/profile/terms, including those
pertaining to warranty, intellectual property rights infringement and limitationof liability, unless explicitly otherwise agreed to in writing by Philips
Semiconductors.Incaseofanyinconsistencyorconflictbetweeninformationin this document and such terms and conditions, the latter will prevail.No offer to sell or license —Nothing in this document may be interpretedor construed as an offer to sell products that is open for acceptance or thegrant,conveyanceorimplicationofanylicenseunderanycopyrights,patentsor other industrial or intellectual property rights.
17.3Disclaimers
General —Information in this document is believed to be accurate and
reliable. However, Philips Semiconductors does not give any representationsor warranties, expressed or implied, as to the accuracy or completeness ofsuch information and shall have no liability for the consequences of use ofsuch information.
Right to make changes —Philips Semiconductors reserves the right tomake changes to information published in this document, including withoutlimitation specifications and product descriptions, at any time and withoutnotice.Thisdocumentsupersedesandreplacesallinformationsuppliedpriorto the publication hereof.
Suitability for use —Philips Semiconductors products are not designed,authorized or warranted to be suitable for use in medical, military, aircraft,space or life support equipment, nor in applications where failure or
malfunctionofaPhilipsSemiconductorsproductcanreasonablybeexpected
17.4Trademarks
Notice:Allreferencedbrands,productnames,servicenamesandtrademarksare the property of their respective owners.
I2C-bus —logo is a trademark of Koninklijke Philips Electronics N.V.
18.Contact information
For additional information, please visit: http://www.semiconductors.philips.com
For sales office addresses, send an email to: sales.addresses@www.semiconductors.philips.com
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19.Contents
1General description. . . . . . . . . . . . . . . . . . . . . . 12Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13Ordering information. . . . . . . . . . . . . . . . . . . . . 23.1Ordering options. . . . . . . . . . . . . . . . . . . . . . . . 24Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 25Pinning information. . . . . . . . . . . . . . . . . . . . . . 35.1Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35.2Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 46Functional description . . . . . . . . . . . . . . . . . . . 56.1Device addressing . . . . . . . . . . . . . . . . . . . . . . 56.2Control register. . . . . . . . . . . . . . . . . . . . . . . . . 56.2.1Control register definition . . . . . . . . . . . . . . . . . 56.3RESET input. . . . . . . . . . . . . . . . . . . . . . . . . . . 66.4Power-on reset . . . . . . . . . . . . . . . . . . . . . . . . . 66.5CBT characteristic over VDD range. . . . . . . . . . 67Characteristics of the I2C-bus. . . . . . . . . . . . . . 87.1Bit transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87.1.1START and STOP conditions . . . . . . . . . . . . . . 87.2System configuration . . . . . . . . . . . . . . . . . . . . 87.3Acknowledge . . . . . . . . . . . . . . . . . . . . . . . . . . 97.4Bus transactions. . . . . . . . . . . . . . . . . . . . . . . 108Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 109Static characteristics. . . . . . . . . . . . . . . . . . . . 1110Dynamic characteristics . . . . . . . . . . . . . . . . . 1311Application information. . . . . . . . . . . . . . . . . . 1512Test information. . . . . . . . . . . . . . . . . . . . . . . . 1613Package outline . . . . . . . . . . . . . . . . . . . . . . . . 1714Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2014.1Introduction to soldering surface mount
packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2014.2Reflow soldering. . . . . . . . . . . . . . . . . . . . . . . 2014.3Wave soldering. . . . . . . . . . . . . . . . . . . . . . . . 2014.4Manual soldering . . . . . . . . . . . . . . . . . . . . . . 2114.5Package related soldering information . . . . . . 2115Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 2216Revision history. . . . . . . . . . . . . . . . . . . . . . . . 2217Legal information. . . . . . . . . . . . . . . . . . . . . . . 2317.1Data sheet status . . . . . . . . . . . . . . . . . . . . . . 2317.2Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 2317.3Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 2317.4Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 2318Contact information. . . . . . . . . . . . . . . . . . . . . 2319
Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Pleasebeawarethatimportantnoticesconcerningthisdocumentandtheproduct(s)described herein, have been included in section ‘Legal information’.
© Koninklijke Philips Electronics N.V.2006.All rights reserved.
For more information, please visit: http://www.semiconductors.philips.com.
For sales office addresses, email to: sales.addresses@www.semiconductors.philips.com.
Date of release: 11 July 2006Document identifier: PCA9549_1
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